1. Field of the Invention
The present invention relates, in general, to semiconductor packages using flip-chip mounting techniques and, more particularly, to a semiconductor package in which a semiconductor device is mounted using both a flip-chip mounting technique and an anisotropic conductive material.
2. Description of the Related Art
In recent years, micromachining techniques, for producing micro-optical elements, micro-optical sensors, micro-bio-chips, and micro-radio-communication devices, such as micro-mirrors, micro-lenses and micro-switches, using semiconductor device manufacturing processes, have been actively studied.
To use semiconductor devices, manufactured through the micromachining techniques, in practical applications, semiconductor packages must be manufactured.
Semiconductor packaging techniques are complex techniques which include a variety of steps for producing the semiconductor devices and the final products. In recent years, semiconductor packaging techniques have been quickly and highly developed such that one million or more cells can be integrated in a package. Particularly, non-memory semiconductor devices are highly developed such that the devices have a great number of I/O pins, a large die size, a great heat dissipation capacity, highly improved electrical functions, etc. However, the conventional semiconductor packaging techniques for packaging the non-memory semiconductor devices cannot keep pace with the rapid development of semiconductor devices.
The semiconductor packaging techniques are very important techniques which determine the operational performance, sizes, costs and operational reliability of final electronic products. Particularly, the semiconductor packaging techniques play a key role in the manufacture of recently developed electronic products which aim for high electronic performances, smallness/high density, low power consumption, multifunctionality, ultrahigh signal processing rates and permanent operational reliability of the products.
To meet the above-mentioned recent trends, a flip-chip bonding technique, which is a kind of technique for electrically connecting a semiconductor chip to a substrate, has been actively studied, proposed and used. However, a conventional flip-chip bonding technique must execute complicated bonding processes using solder, which include applying solder flux onto a substrate, arranging a chip having solder bumps relative to the substrate having surface electrodes, executing the reflow of solder bumps, removing remaining flux, and applying and hardening underfill, thus increasing the costs of final products.
Therefore, in an effort to simplify the complicated processes of the conventional flip-chip bonding techniques, a wafer-phase semiconductor packaging technique, in which a polymer material, functioning as both flux and underfill, is applied to a semiconductor wafer, has been actively studied and developed. Furthermore, a flip-chip bonding technique using a conductive adhesive, which is advantageous in that it can reduce production costs, provide microelectrode pitches, and can be environment-friendly because it does not use flux or lead, and in which processes are executed at low temperatures, has been actively studied and developed.
Conventional conductive material layers are classified into two types: anisotropic conductive material layers and isotropic conductive material layers. A conductive material layer comprises conductive particles, such as Ni, Au/polymer, or Ag particles, and a base resin, such as a thermosetting resin, thermoplastic resin, or blend type insulating resin produced by mixing the properties of the thermosetting resin and the thermoplastic resin.
FIG. 1A is a sectional view illustrating a conventional anisotropic conductive film. As shown in FIG. 1A, the conventional anisotropic conductive film 10 is a polymer resin-based film, with conductive particles 20 finely dispersed in the conductive film 10 to impart conductivity to the film. A releasing film 30 is attached to each surface of the anisotropic conductive film 10.
FIG. 1B is a sectional view illustrating a conventional flip-chip bonding technique for producing a semiconductor package using the anisotropic conductive film of FIG. 1A. As shown in the drawing, a first release film 30 is removed from one surface of the anisotropic conductive film 10 and the exposed surface of the anisotropic conductive film 10 is thermally compressed and adhered to a substrate 50. Thereafter, a second release film 30 is removed from the other surface of the anisotropic conductive film 10. An IC chip 40 having bumps 45 is placed on the exposed surface of the conductive film 10 such that the bumps 45 of the IC chip 40 are aligned with electrodes 55 of the substrate 50. Thereafter, the anisotropic conductive film 10, having the IC chip 40 and the substrate 50, is subjected to thermal compression, so that the conductive particles in the anisotropic conductive film are plastically deformed, thus mechanically and electrically coupling the bumps 45 to the electrodes 55.
However, to use the flip-chip bonding technique, which can produce semiconductor packages using anisotropic conductive films, in the process of producing a semiconductor device using a micromachining technique, it is required to solve some technical problems in advance.